Field
This disclosure relates generally to testing integrated circuits, and more specifically, to utilizing high capacity I/O (input/output) cells for testing integrated circuits.
Related Art
Integrated circuits, such as a die, are often tested for failures after being incorporated into a packaged semiconductor device, which may be referred to as “package-level” testing. However, package-level testing may be quite expensive due to lost fabrication costs that occur when a defective package is discarded.
The present invention is illustrated by way of example and is not limited by the accompanying figures, in which like references indicate similar elements, unless otherwise noted. Elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale.